Embedded Deep Learning Accelerators: A Survey on Recent Advances

Abstract

The exponential increase in generated data as well as the advances in high-performance computing has paved the way for the use of complex machine learning methods. Indeed, the availability of Graphical Processing Units (GPU) and Tensor Processing Units (TPU) have made it possible to train and prototype Deep Neural Networks (DNN) on large-scale data sets and for a variety of applications, i.e., vision, robotics, biomedical, etc. The popularity of these DNNs originates from their efficacy and state-of-the-art inference accuracy. However, this is obtained at the cost of a considerably high computational complexity. Such drawbacks rendered their implementation on limited resources, edge devices, without a major loss in inference speed and accuracy, a dire and challenging task. To this extent, it has become extremely important to design innovative architectures and dedicated accelerators to deploy these DNNs to embedded and re-configurable processors in a high-performance low complexity structure. In this study, we present a survey on recent advances in deep learning accelerators (DLA) for heterogeneous systems and Reduced Instruction Set Computer (RISC-V) processors given their open-source nature, accessibility, customizability and universality. After reading this article, the readers should have a comprehensive overview of the recent progress in this domain, cutting edge knowledge of recent embedded machine learning trends and substantial insights for future research directions and challenges.