Please use this identifier to cite or link to this item: https://scholarhub.balamand.edu.lb/handle/uob/599
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dc.contributor.authorAkkad, Ghattasen_US
dc.contributor.authorAyoubi, Raficen_US
dc.contributor.authorMansour, Alien_US
dc.contributor.authorHassan, Bachar Elen_US
dc.date.accessioned2020-12-23T08:33:14Z-
dc.date.available2020-12-23T08:33:14Z-
dc.date.issued2020-
dc.identifier.urihttps://scholarhub.balamand.edu.lb/handle/uob/599-
dc.description.abstractSorting algorithms are computationally expensive routines frequently executed on modern computers and embedded systems. Implementing sorting algorithms on dedicated hardware can contribute significantly to the overall execution time of the processes and applications embodying them. However, such algorithms are known to suffer from a trade off between convergence time and computational complexity. Consequently, this causes performance degradation i.e. bottleneck, when implemented on dedicated hardware with limited resources. In this respect, this paper proposes a novel sequential hardware architecture for a bit-serial Odd-Even transposition sorting network with on-the-fly compare and swap, on field programmable gate array (FPGA). In contrast to the classical parallel-data architecture, which operates on N data bits, this implementation significantly minimizes resource utilization while offering higher clock frequency, on the fly compare and swap and preserving O(N) performance complexity. Simulation and synthesis results demonstrates that the proposed architecture is parallel, minimal in size, can operate on much larger arrays for a reference area size, can be easily expanded, and can achieve higher operating frequency.en_US
dc.format.extent10 p.en_US
dc.language.isoengen_US
dc.subjectSortingen_US
dc.subjectOdd-Even Transpositionen_US
dc.subjectHardware Architectureen_US
dc.subjectFPGAen_US
dc.subjectLow Latencyen_US
dc.subjectBit-serialen_US
dc.subjectMedian filtersen_US
dc.subject.lcshEmbedded systems (Computer systems)en_US
dc.titleHardware architecture for a bit-serial odd-even transposition sort network with on-the-fly compare and swapen_US
dc.typeConference Paperen_US
dc.relation.conferenceInternational Conference on Applications in Electronics Pervading Industry, Environment and Society (11-13 September 2019 : Pisa, Italy)en_US
dc.contributor.affiliationDepartment of Computer Engineeringen_US
dc.contributor.affiliationDepartment of Computer Engineeringen_US
dc.description.startpage145en_US
dc.description.endpage154en_US
dc.date.catalogued2020-11-06-
dc.description.statusPublisheden_US
dc.identifier.ezproxyURLhttp://ezsecureaccess.balamand.edu.lb/login?url=https://link.springer.com/chapter/10.1007%2F978-3-030-37277-4_17en_US
dc.identifier.OlibID272869-
dc.relation.ispartoftextApplications in Electronics Pervading Industry, Environment and Society.en_US
dc.provenance.recordsourceOliben_US
crisitem.author.parentorgFaculty of Engineering-
Appears in Collections:Department of Computer Engineering
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