Please use this identifier to cite or link to this item: https://scholarhub.balamand.edu.lb/handle/uob/571
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dc.contributor.authorAyoubi, Raficen_US
dc.contributor.authorDaba, Jihad S.en_US
dc.date.accessioned2020-12-23T08:32:40Z-
dc.date.available2020-12-23T08:32:40Z-
dc.date.issued2019-
dc.identifier.urihttps://scholarhub.balamand.edu.lb/handle/uob/571-
dc.description.abstractIn this work, FPGA implementation of a new optimal generalized receiver diversity combining scheme, termed Generalized Maximum Ratio Combining (GMRC), is implemented for transmission via 5G multiple-input-multiple-output (MIMO) channels. The MIMO channels comprise binary phase shift keying-spatially modulated (BPSK-SM) single-input-multiple-output (SIMO) channels that are conceived from robust selective combining of transmit diversity channels. The main disadvantage of GMRC is the fundamental nature of its analysis, which prompts us to investigate the feasibility of a FPGA implementation using a pipeline structure. Such implementation can serve as a practical test-bed for real-life wireless applications. Prior published FPGA implementation applied brute-force technique that led to the use of several square root blocks, which are slow and resource-hungry. In this work, all operations are transformed into addition and multiplication operations only, which are efficient in current FPGA technology due to the availability of such operations at the hardware level. Another important feature of the implementation is pipelining, which further leads to an improved clock cycle and subsequently higher throughput. Using the FPGA implementation on the SIMO channel, the design can be extended to the hardware of spatially modulated hyper-MIMO based 5 th generation networks.en_US
dc.language.isoengen_US
dc.publisherIEEEen_US
dc.subjectDiversity receptionen_US
dc.subjectFading channelsen_US
dc.subjectPipeline processingen_US
dc.subjectHardwareen_US
dc.subjectReceiving antennasen_US
dc.subjectEstimation erroren_US
dc.subject.lcshField programmable gate arraysen_US
dc.titleFPGA design of spatially modulated single-input-multiple-output signals in 5G diversity receiversen_US
dc.typeConference Paperen_US
dc.relation.conferenceIEEE International Conference on Communication, Networks and Satellite (Comnetsat) (1-3 Aug 2019 : Makassar, Indonesia)en_US
dc.contributor.affiliationDepartment of Computer Engineeringen_US
dc.contributor.affiliationDepartment of Electrical Engineeringen_US
dc.date.catalogued2019-10-01-
dc.description.statusPublisheden_US
dc.identifier.ezproxyURLhttp://ezsecureaccess.balamand.edu.lb/login?url=10.1109/COMNETSAT.2019.8844099en_US
dc.identifier.OlibID246546-
dc.relation.ispartoftext2019 IEEE International Conference on Communication, Networks and Satellite (Comnetsat)en_US
dc.provenance.recordsourceOliben_US
Appears in Collections:Department of Computer Engineering
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