Please use this identifier to cite or link to this item: https://scholarhub.balamand.edu.lb/handle/uob/514
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dc.contributor.authorAyoubi, Raficen_US
dc.contributor.authorBayoumi, Magdy A.en_US
dc.date.accessioned2020-12-23T08:31:42Z-
dc.date.available2020-12-23T08:31:42Z-
dc.date.issued2002-
dc.identifier.urihttps://scholarhub.balamand.edu.lb/handle/uob/514-
dc.description.abstractThis paper presents a new efficient parallel implementation of multi-layer perceptron on mesh-connected SIMD machines. A new algorithm to implement the recall and training phases of the multi-layer perceptron network with back-error propagation is devised. The developed algorithm is much faster than other known algorithms of its class and comparable in speed to more complex architecture such as hypercube without the added cost; it requires O(1) multiplications and O(log N ) additions, whereas most others require O(N) multiplications and O(N) additions. The proposed algorithm maximizes parallelism by unfolding the ANN computation to its smallest computational primitives and processes these primitives in parallel.en_US
dc.language.isoengen_US
dc.subjectNeural net architectureen_US
dc.subjectMultilayer perceptronsen_US
dc.subjectParallel architecturesen_US
dc.subjectBackpropagationen_US
dc.titleAn efficient implementation of multi-layer perceptron on mesh architectureen_US
dc.typeConference Paperen_US
dc.relation.conferenceIEEE International Symposium on Circuits and Systems (26-29 May 2002 : Phoenix-Scottsdale, AZ, USA)en_US
dc.contributor.affiliationDepartment of Computer Engineeringen_US
dc.date.catalogued2018-01-11-
dc.description.statusPublisheden_US
dc.identifier.ezproxyURLhttp://ezsecureaccess.balamand.edu.lb/login?url=http://ieeexplore.ieee.org/abstract/document/1010936/en_US
dc.identifier.OlibID176323-
dc.relation.ispartoftext2002 IEEE International Symposium on Circuits and Systems (ISCAS)en_US
dc.provenance.recordsourceOliben_US
Appears in Collections:Department of Computer Engineering
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